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Si4313-B1
4. Modulation Options
All modulation options are programmed in "Register 71h. Modulation Mode Control 2."
4.1. Modulation Type
The Si4313 can be configured to support three alternative modulation options: Gaussian Frequency Shift Keying
(GFSK), Frequency Shift Keying (FSK), and On-Off Keying (OOK). The type of modulation is selected with the
modtyp[1:0] bits in "Register 71h. Modulation Mode Control 2".
modtyp[1:0]
00
01
10
11
Modulation Source
Reserved
OOK
FSK
GFSK
4.2. FIFO Mode
In FIFO mode, the integrated FIFO is used to receive the data. The FIFO is accessed via "Register 7Fh. FIFO
Access" with burst read capability. The FIFO may be configured specific to the application packet size, etc. (see "6.
Data Handling" on page 29 for further information).
In RX mode, the preamble detection threshold and sync needs to be programmed so that the modem knows when
to start filling data into the FIFO. When the FIFO is being used, the data being loaded into or out of the FIFO can
still be observed by configuring the GPIO, which can be useful during development.
4.3. Direct Mode
In many system implementations, it may not be desirable to use a FIFO, and, for this scenario, a “Direct Mode”,
which bypasses the FIFOs entirely, is provided. In Direct Mode, the RX data and RX clock are programmed directly
to the GPIO and used by the microcontroller to process the data without using the FIFO. In direct mode, the
preamble detection threshold (Reg 35h) still needs to be programmed. Once the preamble is detected, algorithms
internal to the modem change. It is not required that the sync be programmed when direct mode is used for RX.
4.3.1. Direct Mode using SPI or nIRQ Pins
In certain applications, it may be desirable to minimize the connections to the microcontroller or to preserve the
GPIOs for other uses. For these cases, it is possible to use the SPI pins and nIRQ as the modulation clock and
data. The SDO pin can be configured to be the data clock by programming trclk = 10. If the nSEL pin is LOW, then
the function of the pin will be SPI data output. If the pin is high and trclk is 10, then, during the RX mode, the data
clock will be available on the SDO pin. If trclk[1:0] is set to 11 and no interrupts are enabled in registers 05 or 06h,
the nIRQ pin can also be used as the RX data clock.
The SDI pin can be configured to be the data source for RX if dtmod = 01. Similarly, if nSEL is LOW, the pin will
function as SPI data-in; if nSEL is HIGH, it will be the received demodulated data.
Rev. 1.0
25
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